The present invention concerns a hardware system which transfers a packet of data from a computing network to a computer system connected to that network.
In processing network data, a significant portion of system resources such as central processing utilization, bus bandwidth, board space, and cost is devoted to the task of data copying for the purposes of splitting network header information from the user data and calculating a data checksum for the data portion of a packet transferred from the network. The checksum calculated at the receiving computing system is compared with a checksum from a transmitting computing system, such as a network server, for verifying the accuracy of the data received.
By making appropriate hardware and software tradeoffs, the present invention implements an inexpensive compact solution that greatly reduces the percentage of system resources devoted to the copying and checksumming of data.
In a computing system connected to a network, data is transferred from the network to the computing system and from the computing system to the network in groups of bytes known as packets. A packet contains a header which includes the size of the header, length of the user data in the packet, packet type and other information about the group of data which is to follow. Following the header is a group of user data which represents the information actually desired to be transferred from the network to the computing system or from the computing system to the network. Furthermore, in many computing systems it is necessary to transfer protection and ownership of just the user data from the operating system to the user, while maintaining header data under operating system control. Many computing systems assign such protection and ownership with granularity equal to the size of a memory page typically several thousand bytes.
Several approaches to data transfer between a computing system and a network have been implemented in the past. One of the prior approaches for the transferring of network data is implemented as follows: A processor moves all data from a network adapter via directed input/output. While moving the data from the network adapter to system memory, the processor creates a checksum of all of the data. If protection and ownership transfer is desired, the processor must also copy the user data to another location in memory. This implementation requires the CPU to intervene substantially and control the entire data transfer, thus occupying the processor and making it unavailable to perform other tasks.
Another implementation involves a network card moving the data into system memory via direct memory access (DMA), and a processor then performs a checksum and copies the data into user space. Although the approach eliminates some of the time that the processor would otherwise need to devote to directed input/output, this solution is far from optimal.
In yet a third prior implementation, a microprocessor or other agent on a network adapter parses the stream of data from the network, calculates a split in the packet between the header data information and the substantive data information, inserts data checksums into the packet based on this information, and transfers data to and from main memory via direct memory access. This approach has quite good performance; however it is costly, takes up significantly greater quantities of board space, and does not scale well with the speed of the microprocessor.
Therefore, it would be desirable to implement an efficient method for network data transfer using a balance of dedicated and semi-dedicated hardware with appropriate software-based correction algorithms to increase efficiency without a substantial increase in cost.